8/2/2023 0 Comments Transistor gate source drainMOS devices with Vt<0 (depletion mode transistors) have been used as inverter load in NMOS enhancement depletion logic in the last century. Integrated DMOS are not symmetric do to space consuming high voltage capability on the drain side. You can make them symmetric, however, if you need. Integrated high voltage MOS are typically not symmetric, because the high voltage capability is added only to the drain side (adds series resistance, not liked on source side, and costs floor space). Integrated low voltage MOS are typically symmetrical, source and drain determined only by biasing. I've never done that myself if you achieve interesting results I will be eager to hear them. First use a tech file (not a discrete mosfet they might not have symmetry), then simulate it with proper biasing for both cases. I do not know why would anyone do that, it might work as a startup circuit.īut here is a suggestion I believe if you bias your transistors properly you can see that the MOSFETs are symmetrical. They will be conducting current even if their gate is connected to their source. Regarding your question I think the same as moottii but I must add that there are transistors that have negative threshold voltage. But there are specialized devices like LDMOS or some other. In layout they look mostly symmetrical and process vendor actually doesn't care which side is drain and which side is source. So other than switching applications it is better to use them as they are, in simulations of course. However I do not think that they model them that way. Firstly, in many modern technologies you can choose which side is drain and which side is source with just biasing.
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